1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly, to a technique that can be effectively applied to a semiconductor integrated circuit such as a high voltage IC (HVIC) for driving a switching element.
2. Description of the Related Art
In general, a switching element of a power conversion bridge circuit is driven by a HVIC in a low-capacity inverter. In general, the HVIC includes, for example, a high-side driving circuit, a low-side driving circuit, a level shifter, and a control circuit. The HVIC transmits a driving signal for turning on and off a gate of a switching element from an output terminal according to a signal fed from the input terminal. In the power conversion bridge circuit, a switching element of a high-side circuit which receives a signal from the HVIC is operated to perform power conversion.
The high-side driving circuit which drives the high-side circuit is a complementary MOS (CMOS) circuit in which a p-channel MOSFET and an n-channel MOSFET as insulated-gate field-effect transistors are connected in a complementary topology. The p-channel MOSFET is provided in an n-type well region which is buried in an upper part of the p-type semiconductor substrate. The n-channel MOSFET is provided in a p-type well region which is buried in an upper part of the n-type well region. The high-side driving circuit operates, using a VS-potential as a reference potential and a VB-potential as a power-supply potential, and transmits a driving signal from an output terminal in accordance with a signal received from the level shift circuit. The VB-potential is the highest potential applied to the HVIC and is maintained at a level that is about 15 V higher than the VS-potential by, for example, a bootstrap capacitor in a normal state in which the VB-potential is not affected by noise. The VS-potential is potential at an output node portion which is a connection point between a high-side switching-element and a low-side switching-element of the power conversion bridge circuit and is changed between 0 V and several hundreds of volts during a power conversion process. In some cases, the VS-potential is a negative potential.
In the HVIC, various types of noise generated by the operation of the switching element are likely to be fed. Therefore, it is important to improve noise immunity such that an operation error or an operation failure does not occur and to ensure high reliability in the design of the HVIC. It is necessary to suppress the operation of a parasitic element in order to improve noise immunity. In particular, it is important to suppress the operation of a parasitic element which is provided immediately below a high-side circuit arrangement area (in the vicinity of a high-side switching-element driving circuit) in the vertical direction of the substrate. The reason is that the area of the parasitic element provided in the vertical direction of the substrate is large and a large amount of current is likely to flow.
JP 2004-47937 A discloses a technique in which an n-type high-concentration buried region is provided between a p-type semiconductor substrate and an n-type semiconductor layer to suppress the operation of a parasitic p-n-p transistor. JP 2011/103429 A discloses a semiconductor device that can suppress the generation of a displacement current for charging and discharging parasitic capacitance due to a dv/dt surge, using an SOI substrate.